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peripheral: add SAU init helpers and jump_to_nonsecure for ARMv8-M#648

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leftger wants to merge 4 commits intorust-embedded:masterfrom
leftger:feat/sau-init-clean
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peripheral: add SAU init helpers and jump_to_nonsecure for ARMv8-M#648
leftger wants to merge 4 commits intorust-embedded:masterfrom
leftger:feat/sau-init-clean

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@leftger
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@leftger leftger commented Apr 21, 2026

Summary

This PR extends the existing SAU peripheral module with higher-level helpers that cover the full ARMv8-M TrustZone boot sequence:

  • SauRegion / SauRegionAttribute: derive Copy, Clone, PartialEq, Eq — these are plain data types and the missing impls made bulk operations unnecessarily verbose.
  • SAU::disable_allns(): sets CTRL.ALLNS=1, ENABLE=0, making the entire address space Non-Secure. Useful for systems that run entirely in Non-Secure mode with no security boundary enforcement.
  • SAU::init(regions: &[SauRegion]): convenience wrapper that disables the SAU, programs up to 8 regions (extras silently ignored, matching the hardware maximum), then re-enables it. Callers that want SecureFault enabled should follow up with scb.enable(Exception::SecureFault).
  • jump_to_nonsecure(ns_vtor: u32) -> ! (#[cfg(armv8m)]): performs the standard Secure→Non-Secure boot handoff — writes SCB_NS->VTOR, loads MSP_NS from the NS vector table, and executes BXNS to atomically switch state and jump to the NS reset handler.

Relationship to PR #647

This PR is independent of #647 (SCB NSACR / NVIC ITNS) and can be reviewed separately. Together they cover the complete ARMv8-M TrustZone setup: SAU region programming (this PR), interrupt routing and FPU access (#647), and NS boot handoff (this PR).

Motivation

The downstream motivating use-case is the embassy-stm32 TrustZone/SAU driver. Currently jump_to_nonsecure lives in that vendor HAL using raw inline assembly. Once this lands it can be replaced with the typed API here, removing duplicated unsafe boot code from every ARMv8-M HAL that needs it.

leftger added 2 commits April 20, 2026 21:58
- Derive Copy, Clone, PartialEq, Eq on SauRegion and SauRegionAttribute
- SAU::disable_allns(): set CTRL.ALLNS=1, ENABLE=0 (all memory Non-Secure)
- SAU::init(regions): disable SAU, program up to 8 regions, re-enable
- jump_to_nonsecure(ns_vtor): Secure→Non-Secure boot handoff via BXNS

These cover the remaining ARMv8-M TrustZone boot sequence after SAU region
programming: disabling the SAU for NS-only systems, bulk-initialising regions
without manually looping set_region, and transferring control to the NS image.
@jonathanpallant
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extras silently ignored

I think it should either panic or return an error if you pass too many regions. The aarch32-cpu MPU set-up code returns an error when the slice of region descriptors given is too long.

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leftger commented Apr 21, 2026

@jonathanpallant I updated the code to address your concern. Thank you for the feedback 😄

Comment thread cortex-m/src/peripheral/sau.rs Outdated
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One question, but otherwise this looks OK to me.

It would be great to see an example of it in action, ideally in the testsuite.

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leftger commented Apr 22, 2026

I have added it to the testsuite

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2 participants